Searched refs:HHI_HDMI_PHY_CNTL3 (Results 1 – 4 of 4) sorted by relevance
| /openbmc/u-boot/drivers/video/meson/ |
| H A D | meson_dw_hdmi.c | 39 #define HHI_HDMI_PHY_CNTL3 0x3ac /* 0xeb */ macro
226 hhi_write(HHI_HDMI_PHY_CNTL3, 0x2136315b); in meson_dw_hdmi_phy_setup_mode()
230 hhi_write(HHI_HDMI_PHY_CNTL3, 0x2036315b); in meson_dw_hdmi_phy_setup_mode()
234 hhi_write(HHI_HDMI_PHY_CNTL3, 0x2016315b); in meson_dw_hdmi_phy_setup_mode()
238 hhi_write(HHI_HDMI_PHY_CNTL3, 0x0016315b); in meson_dw_hdmi_phy_setup_mode()
244 hhi_write(HHI_HDMI_PHY_CNTL3, 0x2100115b); in meson_dw_hdmi_phy_setup_mode()
248 hhi_write(HHI_HDMI_PHY_CNTL3, 0xb000115b); in meson_dw_hdmi_phy_setup_mode()
252 hhi_write(HHI_HDMI_PHY_CNTL3, 0x2000115b); in meson_dw_hdmi_phy_setup_mode()
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| /openbmc/linux/drivers/gpu/drm/meson/ |
| H A D | meson_dw_hdmi.c | 112 #define HHI_HDMI_PHY_CNTL3 0x3ac /* 0xeb */ macro
307 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2136315b); in meson_hdmi_phy_setup_mode()
311 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2036315b); in meson_hdmi_phy_setup_mode()
315 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2016315b); in meson_hdmi_phy_setup_mode()
319 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x0016315b); in meson_hdmi_phy_setup_mode()
326 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2100115b); in meson_hdmi_phy_setup_mode()
330 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0xb000115b); in meson_hdmi_phy_setup_mode()
334 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2000115b); in meson_hdmi_phy_setup_mode()
341 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2ab0ff3b); in meson_hdmi_phy_setup_mode()
346 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2ab0ff3b); in meson_hdmi_phy_setup_mode()
[all …]
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| /openbmc/linux/drivers/clk/meson/ |
| H A D | gxbb.h | 109 #define HHI_HDMI_PHY_CNTL3 0x3AC /* 0xeb offset in data sheet */ macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-meson/ |
| H A D | clock-gx.h | 109 #define HHI_HDMI_PHY_CNTL3 0x3AC /* 0xeb offset in data sheet */ macro
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