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Searched refs:HHI_HDMI_PHY_CNTL0 (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/drivers/video/meson/
H A Dmeson_dw_hdmi.c36 #define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 */ macro
225 hhi_write(HHI_HDMI_PHY_CNTL0, 0x333d3282); in meson_dw_hdmi_phy_setup_mode()
229 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33303382); in meson_dw_hdmi_phy_setup_mode()
233 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33303362); in meson_dw_hdmi_phy_setup_mode()
237 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33604142); in meson_dw_hdmi_phy_setup_mode()
243 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33353245); in meson_dw_hdmi_phy_setup_mode()
247 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33634283); in meson_dw_hdmi_phy_setup_mode()
251 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33632122); in meson_dw_hdmi_phy_setup_mode()
H A Dmeson_vpu_init.c16 #define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 offset in data sheet */ macro
344 hhi_write(HHI_HDMI_PHY_CNTL0, 0); in meson_vpu_init()
/openbmc/linux/drivers/gpu/drm/meson/
H A Dmeson_dw_hdmi.c107 #define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 */ macro
306 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x333d3282); in meson_hdmi_phy_setup_mode()
310 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303382); in meson_hdmi_phy_setup_mode()
314 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303362); in meson_hdmi_phy_setup_mode()
318 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33604142); in meson_hdmi_phy_setup_mode()
325 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33353245); in meson_hdmi_phy_setup_mode()
329 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33634283); in meson_hdmi_phy_setup_mode()
333 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33632122); in meson_hdmi_phy_setup_mode()
340 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x37eb65c4); in meson_hdmi_phy_setup_mode()
345 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33eb6262); in meson_hdmi_phy_setup_mode()
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H A Dmeson_venc.c69 #define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 offset in data sheet */ macro
1984 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0); in meson_venc_init()
/openbmc/linux/drivers/phy/amlogic/
H A Dphy-meson8-hdmi-tx.c25 #define HHI_HDMI_PHY_CNTL0 0x3a0 macro
67 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, in phy_meson8_hdmi_tx_power_on()
92 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, in phy_meson8_hdmi_tx_power_off()
/openbmc/linux/drivers/clk/meson/
H A Dgxbb.h106 #define HHI_HDMI_PHY_CNTL0 0x3A0 /* 0xe8 offset in data sheet */ macro
/openbmc/u-boot/arch/arm/include/asm/arch-meson/
H A Dclock-gx.h106 #define HHI_HDMI_PHY_CNTL0 0x3A0 /* 0xe8 offset in data sheet */ macro