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Searched refs:HDMI_TXPHY_PAD_CFG_CTRL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi_phy.c27 DUMPPHY(HDMI_TXPHY_PAD_CFG_CTRL); in hdmi_phy_dump()
119 REG_FLD_MOD(phy->base, HDMI_TXPHY_PAD_CFG_CTRL, lane_cfg_val, 26, 22); in hdmi_phy_configure_lanes()
120 REG_FLD_MOD(phy->base, HDMI_TXPHY_PAD_CFG_CTRL, pol_val, 30, 27); in hdmi_phy_configure_lanes()
H A Dhdmi5.c91 v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL); in hdmi_irq_handler()
94 hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); in hdmi_irq_handler()
101 REG_FLD_MOD(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15); in hdmi_irq_handler()
H A Dhdmi.h77 #define HDMI_TXPHY_PAD_CFG_CTRL 0xC macro
/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi_phy.c36 DUMPPHY(HDMI_TXPHY_PAD_CFG_CTRL); in hdmi_phy_dump()
128 REG_FLD_MOD(phy->base, HDMI_TXPHY_PAD_CFG_CTRL, lane_cfg_val, 26, 22); in hdmi_phy_configure_lanes()
129 REG_FLD_MOD(phy->base, HDMI_TXPHY_PAD_CFG_CTRL, pol_val, 30, 27); in hdmi_phy_configure_lanes()
H A Dhdmi5.c87 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL); in hdmi_irq_handler()
90 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); in hdmi_irq_handler()
97 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15); in hdmi_irq_handler()
H A Dhdmi.h73 #define HDMI_TXPHY_PAD_CFG_CTRL 0xC macro