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Searched refs:HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v8_0.c1455 WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz << HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT)); in dce_v8_0_afmt_update_ACR()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7376 #define HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT 0x0000000c macro
H A Ddce_8_0_sh_mask.h5858 #define HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT 0xc macro
H A Ddce_10_0_sh_mask.h6344 #define HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT 0xc macro
H A Ddce_11_0_sh_mask.h6332 #define HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT 0xc macro
H A Ddce_11_2_sh_mask.h7412 #define HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT 0xc macro