Searched refs:HDMI_1_PLL_CFG_2 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/phy/mediatek/ |
| H A D | phy-mtk-hdmi-mt8195.c | 60 mtk_phy_set_bits(regs + HDMI_1_PLL_CFG_2, RG_HDMITXPLL_BC); in mtk_hdmi_pll_perf()
61 mtk_phy_update_field(regs + HDMI_1_PLL_CFG_2, RG_HDMITXPLL_IC, 0x1); in mtk_hdmi_pll_perf()
62 mtk_phy_update_field(regs + HDMI_1_PLL_CFG_2, RG_HDMITXPLL_BR, 0x2); in mtk_hdmi_pll_perf()
63 mtk_phy_update_field(regs + HDMI_1_PLL_CFG_2, RG_HDMITXPLL_IR, 0x2); in mtk_hdmi_pll_perf()
64 mtk_phy_set_bits(regs + HDMI_1_PLL_CFG_2, RG_HDMITXPLL_BP); in mtk_hdmi_pll_perf()
67 mtk_phy_clear_bits(regs + HDMI_1_PLL_CFG_2, RG_HDMITXPLL_HIKVCO); in mtk_hdmi_pll_perf()
102 mtk_phy_set_bits(regs + HDMI_1_PLL_CFG_2, RG_HDMITXPLL_PWD); in mtk_hdmi_pll_set_hw()
386 mtk_phy_clear_bits(regs + HDMI_1_PLL_CFG_2, RG_HDMITXPLL_PWD); in mtk_hdmi_pll_prepare()
401 mtk_phy_set_bits(regs + HDMI_1_PLL_CFG_2, RG_HDMITXPLL_PWD); in mtk_hdmi_pll_unprepare()
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| H A D | phy-mtk-hdmi-mt8195.h | 82 #define HDMI_1_PLL_CFG_2 0x4c macro
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