Searched refs:HDMI_1_CFG_2 (Results 1 – 2 of 2) sorted by relevance
349 mtk_phy_update_field(regs + HDMI_1_CFG_2, RG_HDMITX21_DRV_IMP_D0_EN1, impedance); in mtk_hdmi_pll_drv_setting()350 mtk_phy_update_field(regs + HDMI_1_CFG_2, RG_HDMITX21_DRV_IMP_D1_EN1, impedance); in mtk_hdmi_pll_drv_setting()351 mtk_phy_update_field(regs + HDMI_1_CFG_2, RG_HDMITX21_DRV_IMP_D2_EN1, impedance); in mtk_hdmi_pll_drv_setting()352 mtk_phy_update_field(regs + HDMI_1_CFG_2, RG_HDMITX21_DRV_IMP_CLK_EN1, impedance); in mtk_hdmi_pll_drv_setting()
39 #define HDMI_1_CFG_2 0x08 macro