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Searched refs:HCR_FWB (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/arch/arm64/include/asm/
H A Dkvm_arm.h29 #define HCR_FWB (UL(1) << 46) macro
H A Dkvm_emulate.h82 vcpu->arch.hcr_el2 |= HCR_FWB; in vcpu_reset_hcr()
/openbmc/qemu/target/arm/
H A Dptw.c517 if (hcr & HCR_FWB) { in S2_attrs_are_device()
3195 if (hcr & HCR_FWB) { in combine_cacheattrs()
H A Dcpu.h1638 #define HCR_FWB (1ULL << 46)
1635 #define HCR_FWB global() macro
H A Dhelper.c6190 valid_mask |= HCR_FWB;
6218 * HCR_FWB changes the interpretation of stage2 descriptor bits in hcrx_write()
6222 (HCR_VM | HCR_PTW | HCR_DC | HCR_DCT | HCR_FWB | HCR_NV | HCR_NV1)) { in hcrx_write()