| /openbmc/qemu/target/riscv/ |
| H A D | vector_helper.c | 174 GEN_VEXT_LD_ELEM(lde_d, uint64_t, H8, ldq) in GEN_VEXT_LD_ELEM()
195 GEN_VEXT_ST_ELEM(ste_d, uint64_t, H8, stq)
520 GEN_VEXT_GET_INDEX_ADDR(idx_d, uint64_t, H8) in GEN_VEXT_GET_INDEX_ADDR()
887 RVVCALL(OPIVV2, vadd_vv_d, OP_SSS_D, H8, H8, H8, DO_ADD)
891 RVVCALL(OPIVV2, vsub_vv_d, OP_SSS_D, H8, H8, H8, DO_SUB)
906 RVVCALL(OPIVX2, vadd_vx_d, OP_SSS_D, H8, H8, DO_ADD)
910 RVVCALL(OPIVX2, vsub_vx_d, OP_SSS_D, H8, H8, DO_SUB)
914 RVVCALL(OPIVX2, vrsub_vx_d, OP_SSS_D, H8, H8, DO_RSUB)
984 RVVCALL(OPIVV2, vwaddu_vv_w, WOP_UUU_W, H8, H4, H4, DO_ADD) in RVVCALL()
987 RVVCALL(OPIVV2, vwsubu_vv_w, WOP_UUU_W, H8, H4, H4, DO_SUB) in RVVCALL()
[all …]
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| H A D | vcrypto_helper.c | 56 RVVCALL(OPIVV2, vclmul_vv, OP_UUU_D, H8, H8, H8, clmul64) in RVVCALL() argument
58 RVVCALL(OPIVX2, vclmul_vx, OP_UUU_D, H8, H8, clmul64) in RVVCALL()
60 RVVCALL(OPIVV2, vclmulh_vv, OP_UUU_D, H8, H8, H8, clmulh64) in RVVCALL()
62 RVVCALL(OPIVX2, vclmulh_vx, OP_UUU_D, H8, H8, clmulh64) in RVVCALL()
68 RVVCALL(OPIVV2, vror_vv_d, OP_UUU_D, H8, H8, H8, ror64) in RVVCALL()
77 RVVCALL(OPIVX2, vror_vx_d, OP_UUU_D, H8, H8, ror64) in RVVCALL()
86 RVVCALL(OPIVV2, vrol_vv_d, OP_UUU_D, H8, H8, H8, rol64) in RVVCALL()
95 RVVCALL(OPIVX2, vrol_vx_d, OP_UUU_D, H8, H8, rol64) in RVVCALL()
116 RVVCALL(OPIVV1, vbrev8_v_d, OP_UU_D, H8, H8, brev8) in RVVCALL()
126 RVVCALL(OPIVV1, vrev8_v_d, OP_UU_D, H8, H8, bswap64) in RVVCALL()
[all …]
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| H A D | vector_internals.h | 49 #define H8(x) ((x)) macro
56 #define H8(x) (x) macro
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| /openbmc/u-boot/drivers/power/ |
| H A D | Kconfig | 164 On A83T / H8 boards aldo1 is used for MIPI CSI, DSI, HDMI, EFUSE, and
182 On A83T / H8 boards aldo2 powers VDD-DLL, VCC18-PLL, CPVDD, VDD18-ADC,
197 On A83T / H8 boards aldo3 is AVCC, VCC-PL, and VCC-LED, and should be
323 On A83T / H8 boards fldo1 is VCC-HSIC and should be 1.2V if HSIC is
333 On A83T / H8 boards fldo2 is VCC-CPUS and should be 0.9V.
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| /openbmc/qemu/target/arm/tcg/ |
| H A D | vec_internal.h | 50 #define H8(x) (x) macro
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| H A D | vec_helper.c | 872 DO_DOT_IDX(gvec_sdot_idx_h, int64_t, int16_t, int16_t, H8)
873 DO_DOT_IDX(gvec_udot_idx_h, uint64_t, uint16_t, uint16_t, H8)
1570 DO_MUL_IDX(gvec_mul_idx_d, uint64_t, H8)
1592 DO_MLA_IDX(gvec_mla_idx_d, uint64_t, +, H8)
1596 DO_MLA_IDX(gvec_mls_idx_d, uint64_t, -, H8)
1620 DO_FMUL_IDX(gvec_fmul_idx_d, nop, float64_mul, float64, H8)
1626 DO_FMUL_IDX(gvec_fmulx_idx_d, nop, helper_vfp_mulxd, float64, H8)
1665 DO_FMLA_IDX(gvec_fmla_idx_d, float64, H8)
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| H A D | mve_helper.c | 860 mergemask(&da[H8(e)], FN(da[H8(e)], imm), mask); \
2089 uint64_t r = (SHIFTFN(m[H8(e)], shift) & shiftmask) | \
2090 (d[H8(e)] & ~shiftmask); \
2091 mergemask(&d[H8(e)], r, mask); \
2690 uint64_t r = m[H8(e)];
2691 mergemask(&r, n[H8(e)], p0);
2692 mergemask(&d[H8(e)], r, mask);
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| H A D | sve_helper.c | 1328 DO_CMLA_FUNC(sve2_cmla_zzzz_d, uint64_t, H8, DO_CMLA)
1342 DO_CMLA_FUNC(sve2_sqrdcmlah_zzzz_d, int64_t, H8, DO_SQRDMLAH_D)
1500 DO_ZZXZ(sve2_sqrdmlah_idx_d, int64_t, H8, DO_SQRDMLAH_D) in DO_ZZXZ()
1510 DO_ZZXZ(sve2_sqrdmlsh_idx_d, int64_t, H8, DO_SQRDMLSH_D)
3027 DO_TB(d, uint64_t, H8)
3048 DO_UNPK(sve_sunpk_d, int64_t, int32_t, H8, H4)
3052 DO_UNPK(sve_uunpk_d, uint64_t, uint32_t, H8, H4)
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| /openbmc/linux/Documentation/driver-api/ |
| H A D | pin-control.rst | 433 to its physical pins. It will name the pins { A1, A2, A3 ... H6, H7, H8 } using
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