Home
last modified time | relevance | path

Searched refs:GTBUS_SRC_PLL_PERIPH1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dclock_sun9i.c54 writel(GTBUS_SRC_PLL_PERIPH1 | GTBUS_CLK_DIV_RATIO(3), in clock_init_safe()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun9i.h168 #define GTBUS_SRC_PLL_PERIPH1 (0x2 << GTBUS_SRC_CLK_SELECT_SHIFT) macro