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Searched refs:GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h5200 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h5986 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h6520 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21340 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT macro
H A Dgc_9_2_1_sh_mask.h22590 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT macro
H A Dgc_9_1_sh_mask.h22651 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT macro
H A Dgc_9_4_3_sh_mask.h24785 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT macro
H A Dgc_9_4_2_sh_mask.h16399 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT macro
H A Dgc_11_0_0_sh_mask.h31197 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT macro
H A Dgc_11_0_3_sh_mask.h33806 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT macro
H A Dgc_10_1_0_sh_mask.h31185 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT macro
H A Dgc_10_3_0_sh_mask.h29433 #define GRBM_SE3_PERFCOUNTER_SELECT__PERF_SEL__SHIFT macro