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Searched refs:GPC_IMR1_M4 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/mx7/
H A Dsoc.c30 #define GPC_IMR1_M4 0x50 macro
211 writel(~0, GPC_IPS_BASE_ADDR + GPC_IMR1_M4 + i * 4); in imx_gpcv2_init()