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Searched refs:GICD_ITARGETSR (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/hw/intc/
H A Darm_gicv3_dist.c285 case GICD_ITARGETSR ... GICD_ITARGETSR + 0x3ff: in gicd_readb()
305 case GICD_ITARGETSR ... GICD_ITARGETSR + 0x3ff: in gicd_writeb()
474 case GICD_ITARGETSR ... GICD_ITARGETSR + 0x3ff: in gicd_readl()
679 case GICD_ITARGETSR ... GICD_ITARGETSR + 0x3ff: in gicd_writel()
H A Dgicv3_internal.h48 #define GICD_ITARGETSR 0x0800 macro
/openbmc/linux/include/linux/irqchip/
H A Darm-gic-v3.h53 #define GICD_ITARGETSR 0x0800 macro
/openbmc/linux/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c657 REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ITARGETSR,