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Searched refs:GICD_CLRSPI_NSR (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/
H A Dgic.h16 #define GICD_CLRSPI_NSR 0x0048 macro
/openbmc/linux/drivers/irqchip/
H A Dirq-gic-v3-mbi.c206 msg[1].address_hi = upper_32_bits(mbi_phys_base + GICD_CLRSPI_NSR); in mbi_compose_mbi_msg()
207 msg[1].address_lo = lower_32_bits(mbi_phys_base + GICD_CLRSPI_NSR); in mbi_compose_mbi_msg()
/openbmc/qemu/hw/intc/
H A Dgicv3_internal.h36 #define GICD_CLRSPI_NSR 0x0048 macro
/openbmc/linux/include/linux/irqchip/
H A Darm-gic-v3.h19 #define GICD_CLRSPI_NSR 0x0048 macro