/openbmc/linux/drivers/edac/ |
H A D | skx_base.c | 174 return !!GET_BITFIELD(mcmtr, 2, 2); in skx_check_ecc() 225 #define SKX_SAD_ATTR(sad) GET_BITFIELD((sad), 3, 4) 300 idx = GET_BITFIELD(addr, 6, 8); in skx_sad_decode() 303 idx = GET_BITFIELD(addr, 8, 10); in skx_sad_decode() 306 idx = GET_BITFIELD(addr, 12, 14); in skx_sad_decode() 309 idx = GET_BITFIELD(addr, 30, 32); in skx_sad_decode() 313 tgt = GET_BITFIELD(ilv, 4 * idx, 4 * idx + 3); in skx_sad_decode() 385 #define SKX_TAD_SKT_GRAN(b) GET_BITFIELD((b), 4, 5) 459 #define SKX_RIR_VALID(b) GET_BITFIELD((b), 31, 31) 543 int ret = GET_BITFIELD(addr, b0, b0) | (GET_BITFIELD(addr, b1, b1) << 1); in skx_bank_bits() [all …]
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H A D | sb_edac.c | 51 #define GET_BITFIELD(v, lo, hi) \ macro 246 GET_BITFIELD(reg, 20, 23) : GET_BITFIELD(reg, 16, 19)) 249 GET_BITFIELD(reg, 2, 15) : GET_BITFIELD(reg, 2, 14)) 847 return GET_BITFIELD(reg, 1, 1); in interleave_mode() 852 return GET_BITFIELD(reg, 2, 3); in dram_attr() 862 return GET_BITFIELD(reg, 1, 2); in knl_interleave_mode() 879 return GET_BITFIELD(reg, 3, 4); in dram_attr_knl() 891 if (GET_BITFIELD(reg, 11, 11)) in get_memory_type() 914 if (GET_BITFIELD(reg, 16, 16)) in haswell_get_memory_type() 1969 int ret = GET_BITFIELD(addr, b0, b0) | (GET_BITFIELD(addr, b1, b1) << 1); in sb_bank_bits() [all …]
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H A D | skx_common.c | 206 *id = GET_BITFIELD(reg, 12, 14); in skx_get_src_id() 219 *id = GET_BITFIELD(reg, 0, 2); in skx_get_node_id() 225 switch (GET_BITFIELD(mtr, 8, 9)) { in get_width() 267 d->bus[0] = GET_BITFIELD(reg, 0, 7); in skx_get_all_bus_mappings() 268 d->bus[1] = GET_BITFIELD(reg, 8, 15); in skx_get_all_bus_mappings() 271 d->bus[2] = GET_BITFIELD(reg, 16, 23); in skx_get_all_bus_mappings() 272 d->bus[3] = GET_BITFIELD(reg, 24, 31); in skx_get_all_bus_mappings() 274 d->seg = GET_BITFIELD(reg, 16, 23); in skx_get_all_bus_mappings() 330 u32 val = GET_BITFIELD(reg, lobit, hibit); in skx_get_dimm_attr() 539 bool ripv = GET_BITFIELD(m->mcgstatus, 0, 0); in skx_mce_output_error() [all …]
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H A D | igen6_edac.c | 82 #define ECC_ERROR_LOG_ADDR(v) GET_BITFIELD(v, 5, 38) 83 #define ECC_ERROR_LOG_SYND(v) GET_BITFIELD(v, 46, 61) 88 #define MCHBAR_BASE(v) (GET_BITFIELD(v, 16, 38) << 16) 95 #define MAD_INTER_CHANNEL_ECHM(v) GET_BITFIELD(v, 3, 3) 106 #define MAD_DIMM_CH_DLW(v) GET_BITFIELD(v, 7, 8) 108 #define MAD_DIMM_CH_DSW(v) GET_BITFIELD(v, 24, 25) 112 #define MAC_MC_HASH_LSB(v) GET_BITFIELD(v, 1, 3) 120 #define CHANNEL_HASH_MODE(v) GET_BITFIELD(v, 28, 28) 317 GET_BITFIELD(eaddr, 0, intlv_bit - 1); in tgl_err_addr_to_mem_addr() 356 GET_BITFIELD(eaddr, 0, intlv_bit - 1); in adl_err_addr_to_imc_addr() [all …]
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H A D | i10nm_base.c | 64 GET_BITFIELD(reg, 0, 10) + 1) << 12) 66 ((GET_BITFIELD(reg, 0, 10) << 12) + 0x140000) 76 #define I10NM_SAD_ENABLE(reg) GET_BITFIELD(reg, 0, 0) 536 res->row = GET_BITFIELD(m->misc, 19, 39); in i10nm_mc_decode() 537 res->bank_group = GET_BITFIELD(m->misc, 40, 41); in i10nm_mc_decode() 538 res->bank_address = GET_BITFIELD(m->misc, 42, 43); in i10nm_mc_decode() 540 res->rank = GET_BITFIELD(m->misc, 56, 58); in i10nm_mc_decode() 549 res->row = GET_BITFIELD(m->misc, 19, 36); in i10nm_mc_decode() 550 res->bank_group = GET_BITFIELD(m->misc, 37, 38); in i10nm_mc_decode() 551 res->bank_address = GET_BITFIELD(m->misc, 39, 40); in i10nm_mc_decode() [all …]
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H A D | skx_common.h | 29 #define GET_BITFIELD(v, lo, hi) \ macro 53 #define IS_DIMM_PRESENT(r) GET_BITFIELD(r, 15, 15) 54 #define IS_NVDIMM_PRESENT(r, i) GET_BITFIELD(r, i, i)
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H A D | pnd2_edac.c | 125 #define GET_BITFIELD(v, lo, hi) (((v) & GENMASK_ULL(hi, lo)) >> (lo)) macro 1130 u32 core_err_cnt = GET_BITFIELD(m->status, 38, 52); in pnd2_mce_output_error() 1131 u32 mscod = GET_BITFIELD(m->status, 16, 31); in pnd2_mce_output_error() 1132 u32 errcode = GET_BITFIELD(m->status, 0, 15); in pnd2_mce_output_error() 1133 u32 optypenum = GET_BITFIELD(m->status, 4, 6); in pnd2_mce_output_error()
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