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Searched refs:GEN8_RING_CS_GPR (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/
H A Di915_cmd_parser.c651 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 0),
652 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 1),
653 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 2),
654 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 3),
655 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 4),
656 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 5),
657 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 6),
658 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 7),
659 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 8),
660 REG64_BASE_IDX(GEN8_RING_CS_GPR, RENDER_RING_BASE, 9),
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H A Dintel_gvt_mmio_table.c1241 MMIO_F(GEN8_RING_CS_GPR(RENDER_RING_BASE, 0), 0x40); in iterate_bxt_mmio()
1242 MMIO_F(GEN8_RING_CS_GPR(GEN6_BSD_RING_BASE, 0), 0x40); in iterate_bxt_mmio()
1243 MMIO_F(GEN8_RING_CS_GPR(BLT_RING_BASE, 0), 0x40); in iterate_bxt_mmio()
1244 MMIO_F(GEN8_RING_CS_GPR(VEBOX_RING_BASE, 0), 0x40); in iterate_bxt_mmio()
H A Di915_perf.c1975 #define CS_GPR(x) GEN8_RING_CS_GPR(base, x) in alloc_noa_wait()
/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_lrc.c1261 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_timestamp_wa()
1269 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_timestamp_wa()
1275 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_timestamp_wa()
1289 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_restore_scratch()
1305 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_cmd_buf_wa()
1313 *cs++ = i915_mmio_reg_offset(GEN8_RING_CS_GPR(0, 0)); in gen12_emit_cmd_buf_wa()
H A Dintel_engine_regs.h231 #define GEN8_RING_CS_GPR(base, n) _MMIO((base) + 0x600 + (n) * 8) macro
H A Dselftest_rps.c68 #define CS_GPR(x) GEN8_RING_CS_GPR(engine->mmio_base, x) in create_spin_counter()
H A Dselftest_timeline.c782 const u32 gpr = i915_mmio_reg_offset(GEN8_RING_CS_GPR(rq->engine->mmio_base, 0)); in emit_read_hwsp()
H A Dselftest_lrc.c354 i915_mmio_reg_offset(GEN8_RING_CS_GPR(engine->mmio_base, 0)), in live_lrc_fixed()
/openbmc/linux/drivers/gpu/drm/i915/selftests/
H A Di915_perf.c307 gpr0 = i915_mmio_reg_offset(GEN8_RING_CS_GPR(stream->engine->mmio_base, 0)); in live_noa_gpr()
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c2781 MMIO_F(GEN8_RING_CS_GPR(RENDER_RING_BASE, 0), 0x40, F_CMD_ACCESS, in init_bxt_mmio_info()
2783 MMIO_F(GEN8_RING_CS_GPR(GEN6_BSD_RING_BASE, 0), 0x40, F_CMD_ACCESS, in init_bxt_mmio_info()
2785 MMIO_F(GEN8_RING_CS_GPR(BLT_RING_BASE, 0), 0x40, F_CMD_ACCESS, in init_bxt_mmio_info()
2787 MMIO_F(GEN8_RING_CS_GPR(VEBOX_RING_BASE, 0), 0x40, F_CMD_ACCESS, in init_bxt_mmio_info()