Searched refs:GEN12_DOP_CLOCK_GATE_RENDER_ENABLE (Results 1 – 2 of 2) sorted by relevance
1501 wa_add(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE, in gen12_gt_workarounds_init()1611 wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE); in dg2_gt_workarounds_init()1633 wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE); in pvc_gt_workarounds_init()1661 wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE); in xelpg_gt_workarounds_init()
701 #define GEN12_DOP_CLOCK_GATE_RENDER_ENABLE REG_BIT(1) macro