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Searched refs:GDS_CONFIG__SH5_GPR_PHASE_SEL__SHIFT (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_sh_mask.h5150 #define GDS_CONFIG__SH5_GPR_PHASE_SEL__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h6832 #define GDS_CONFIG__SH5_GPR_PHASE_SEL__SHIFT … macro