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Searched refs:GCK_PLL_TEST_CNTL_2__TEST_COUNT__SHIFT (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_0_sh_mask.h286 #define GCK_PLL_TEST_CNTL_2__TEST_COUNT__SHIFT 0x11 macro
H A Dsmu_7_1_1_sh_mask.h284 #define GCK_PLL_TEST_CNTL_2__TEST_COUNT__SHIFT 0x11 macro
H A Dsmu_7_1_0_sh_mask.h282 #define GCK_PLL_TEST_CNTL_2__TEST_COUNT__SHIFT 0x11 macro
H A Dsmu_7_0_1_sh_mask.h284 #define GCK_PLL_TEST_CNTL_2__TEST_COUNT__SHIFT 0x11 macro
H A Dsmu_7_1_3_sh_mask.h312 #define GCK_PLL_TEST_CNTL_2__TEST_COUNT__SHIFT 0x11 macro
H A Dsmu_7_1_2_sh_mask.h284 #define GCK_PLL_TEST_CNTL_2__TEST_COUNT__SHIFT 0x11 macro