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Searched refs:GCC_PCIEPHY_0_PHY_BCR (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,gcc-qcs404.h168 #define GCC_PCIEPHY_0_PHY_BCR 12 macro
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,pcie2-phy.yaml75 resets = <&gcc GCC_PCIEPHY_0_PHY_BCR>,
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dqcs404.dtsi962 resets = <&gcc GCC_PCIEPHY_0_PHY_BCR>,
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-qcs404.c2779 [GCC_PCIEPHY_0_PHY_BCR] = { 0x3e03c },