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Searched refs:GATE_INFRA (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7622-infracfg.c17 #define GATE_INFRA(_id, _name, _parent, _shift) \ macro
38 GATE_INFRA(CLK_INFRA_DBGCLK_PD, "infra_dbgclk_pd", "axi_sel", 0),
39 GATE_INFRA(CLK_INFRA_TRNG, "trng_ck", "axi_sel", 2),
40 GATE_INFRA(CLK_INFRA_AUDIO_PD, "infra_audio_pd", "aud_intbus_sel", 5),
41 GATE_INFRA(CLK_INFRA_IRRX_PD, "infra_irrx_pd", "irrx_sel", 16),
42 GATE_INFRA(CLK_INFRA_APXGPT_PD, "infra_apxgpt_pd", "f10m_ref_sel", 18),
43 GATE_INFRA(CLK_INFRA_PMIC_PD, "infra_pmic_pd", "pmicspi_sel", 22),
H A Dclk-mt2712.c843 #define GATE_INFRA(_id, _name, _parent, _shift) \ macro
847 GATE_INFRA(CLK_INFRA_DBGCLK, "infra_dbgclk", "axi_sel", 0),
848 GATE_INFRA(CLK_INFRA_GCE, "infra_gce", "axi_sel", 6),
849 GATE_INFRA(CLK_INFRA_M4U, "infra_m4u", "mem_sel", 8),
850 GATE_INFRA(CLK_INFRA_KP, "infra_kp", "axi_sel", 16),
851 GATE_INFRA(CLK_INFRA_AO_SPI0, "infra_ao_spi0", "spi_sel", 24),
852 GATE_INFRA(CLK_INFRA_AO_SPI1, "infra_ao_spi1", "spislv_sel", 25),
853 GATE_INFRA(CLK_INFRA_AO_UART5, "infra_ao_uart5", "axi_sel", 26),
H A Dclk-mt7629.c54 #define GATE_INFRA(_id, _name, _parent, _shift) \ macro
332 GATE_INFRA(CLK_INFRA_DBGCLK_PD, "infra_dbgclk_pd", "hd_faxi", 0),
333 GATE_INFRA(CLK_INFRA_TRNG_PD, "infra_trng_pd", "hd_faxi", 2),
334 GATE_INFRA(CLK_INFRA_DEVAPC_PD, "infra_devapc_pd", "hd_faxi", 4),
335 GATE_INFRA(CLK_INFRA_APXGPT_PD, "infra_apxgpt_pd", "infrao_10m", 18),
336 GATE_INFRA(CLK_INFRA_SEJ_PD, "infra_sej_pd", "infrao_10m", 19),
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c588 #define GATE_INFRA(_id, _parent, _shift) { \ macro
597 GATE_INFRA(CLK_INFRA_DBG, CLK_TOP_AXI_SEL, 0),
598 GATE_INFRA(CLK_INFRA_SMI, CLK_TOP_MM_SEL, 1),
599 GATE_INFRA(CLK_INFRA_QAXI_CM4, CLK_TOP_AXI_SEL, 2),
600 GATE_INFRA(CLK_INFRA_AUD_SPLIN_B, CLK_TOP_HADDS2PLL_294M, 4),
601 GATE_INFRA(CLK_INFRA_AUDIO, CLK_XTAL, 5),
602 GATE_INFRA(CLK_INFRA_EFUSE, CLK_XTAL, 6),
603 GATE_INFRA(CLK_INFRA_L2C_SRAM, CLK_TOP_MM_SEL, 7),
604 GATE_INFRA(CLK_INFRA_M4U, CLK_TOP_MEM_SEL, 8),
605 GATE_INFRA(CLK_INFRA_CONNMCU, CLK_TOP_WBG_DIG_416M, 12),
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H A Dclk-mt7629.c425 #define GATE_INFRA(_id, _parent, _shift) { \ macro
434 GATE_INFRA(CLK_INFRA_DBGCLK_PD, CLK_TOP_HD_FAXI, 0),
435 GATE_INFRA(CLK_INFRA_TRNG_PD, CLK_TOP_HD_FAXI, 2),
436 GATE_INFRA(CLK_INFRA_DEVAPC_PD, CLK_TOP_HD_FAXI, 4),
437 GATE_INFRA(CLK_INFRA_APXGPT_PD, CLK_TOP_10M_INFRAO, 18),
438 GATE_INFRA(CLK_INFRA_SEJ_PD, CLK_TOP_10M_INFRAO, 19),