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Searched refs:GATE_ETH1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c710 #define GATE_ETH1(_id, _parent, _shift) \ macro
714 GATE_ETH1(CLK_ETHSYS_HSDMA, CLK_TOP_ETHIF_SEL, 5),
715 GATE_ETH1(CLK_ETHSYS_ESW, CLK_TOP_ETHPLL_500M, 6),
717 GATE_ETH1(CLK_ETHSYS_GP1, CLK_TOP_ETHPLL_500M, 8),
718 GATE_ETH1(CLK_ETHSYS_PCM, CLK_TOP_ETHIF_SEL, 11),
719 GATE_ETH1(CLK_ETHSYS_GDMA, CLK_TOP_ETHIF_SEL, 14),
720 GATE_ETH1(CLK_ETHSYS_I2S, CLK_TOP_ETHIF_SEL, 17),
721 GATE_ETH1(CLK_ETHSYS_CRYPTO, CLK_TOP_ETHIF_SEL, 29),
H A Dclk-mt7629.c510 #define GATE_ETH1(_id, _parent, _shift) \ macro
515 GATE_ETH1(CLK_ETH_GP2_EN, CLK_TOP_TXCLK_SRC_PRE, 7),
516 GATE_ETH1(CLK_ETH_GP1_EN, CLK_TOP_TXCLK_SRC_PRE, 8),
517 GATE_ETH1(CLK_ETH_GP0_EN, CLK_TOP_TXCLK_SRC_PRE, 9),
518 GATE_ETH1(CLK_ETH_ESW_EN, CLK_TOP_ETH_500M, 16),