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Searched refs:FSR__ (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_fp0_arith.S48 FSR__, FSR__, FSR__, FSR__
61 FSR__, FSR__, FSR__, FSR__
88 FSR__, FSR__, FSR__, FSR__
92 FSR__, FSR__, FSR__, FSR__
96 FSR__, FSR__, FSR__, FSR__
99 FSR__, FSR__, FSR__, FSR__
103 FSR__, FSR__, FSR__, FSR__
107 FSR__, FSR__, FSR__, FSR__
122 FSR__, FSR__, FSR__, FSR__
152 FSR__, FSR__, FSR__, FSR__
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H A Dtest_dfp0_arith.S42 FSR__, FSR__, FSR__, FSR__
54 FSR__, FSR__, FSR__, FSR__
78 FSR__, FSR__, FSR__, FSR__
109 FSR__, FSR__, FSR__, FSR__
116 FSR__, FSR__, FSR__, FSR__
119 FSR__, FSR__, FSR__, FSR__
122 FSR__, FSR__, FSR__, FSR__
126 FSR__, FSR__, FSR__, FSR__
129 FSR__, FSR__, FSR__, FSR__
132 FSR__, FSR__, FSR__, FSR__
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H A Dtest_fp0_conv.S88 test_ftoi round.s, a2, f0, 0xcf000000, 0, 0x80000000, FSR__
89 test_ftoi round.s, a2, f0, 0xceffffff, 0, 0x80000080, FSR__
102 test_ftoi round.s, a2, f0, 0x3f800000, 0, 1, FSR__ /* 1 */
108 test_ftoi round.s, a2, f0, 0x4effffff, 0, 0x7fffff80, FSR__
130 test_ftoi trunc.s, a2, f0, 0xcf000000, 0, 0x80000000, FSR__
131 test_ftoi trunc.s, a2, f0, 0xceffffff, 0, 0x80000080, FSR__
144 test_ftoi trunc.s, a2, f0, 0x3f800000, 0, 1, FSR__ /* 1 */
186 test_ftoi floor.s, a2, f0, 0x3f800000, 0, 1, FSR__ /* 1 */
228 test_ftoi ceil.s, a2, f0, 0x3f800000, 0, 1, FSR__ /* 1 */
292 test_itof float.s, f0, a2, 0, 0, 0, 0, 0, 0, FSR__
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H A Dtest_fp1.S42 test_ord \op b0, f0, f1, 0x3f800000, 0x3f800000, \aa, FSR__ /* ord == ord */
43 test_ord \op b1, f2, f3, 0x3f800000, 0x3fc00000, \ab, FSR__ /* ord < ord */
44 test_ord \op b2, f4, f5, 0x3fc00000, 0x3f800000, \ba, FSR__ /* ord > ord */
45 test_ord \op b3, f6, f7, 0x3f800000, 0x7f800000, \aPI, FSR__ /* ord +INF */
46 test_ord \op b4, f8, f9, 0x7f800000, 0x3f800000, \PIa, FSR__ /* +INF ord */
55 test_ord \op b13, f10, f11, 0x7f800000, 0x7f800000, \II, FSR__ /* +INF +INF */
63 test_ord_all un.s, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, FSR__
67 test_ord_all oeq.s, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, FSR__
71 test_ord_all ueq.s, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, FSR__
79 test_ord_all ult.s, 0, 1, 0, 1, 0, 1, 1, 0, 1, 1, FSR__
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H A Dtest_fp0_sqrt.S68 FSR__, FSR__, FSR__, FSR__
H A Dfpu.h12 #define FSR__ 0x00000000 macro