| /openbmc/qemu/tests/tcg/xtensa/ |
| H A D | test_dfp0_arith.S | 47 FSR_V, FSR_V, FSR_V, FSR_V
58 FSR_V, FSR_V, FSR_V, FSR_V
63 FSR_V, FSR_V, FSR_V, FSR_V
67 FSR_V, FSR_V, FSR_V, FSR_V
71 FSR_V, FSR_V, FSR_V, FSR_V
96 FSR_V, FSR_V, FSR_V, FSR_V
141 FSR_V, FSR_V, FSR_V, FSR_V
145 FSR_V, FSR_V, FSR_V, FSR_V
149 FSR_V, FSR_V, FSR_V, FSR_V
154 FSR_V, FSR_V, FSR_V, FSR_V
[all …]
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| H A D | test_fp0_arith.S | 53 FSR_V, FSR_V, FSR_V, FSR_V
65 FSR_V, FSR_V, FSR_V, FSR_V
70 FSR_V, FSR_V, FSR_V, FSR_V
73 FSR_V, FSR_V, FSR_V, FSR_V
77 FSR_V, FSR_V, FSR_V, FSR_V
81 FSR_V, FSR_V, FSR_V, FSR_V
140 FSR_V, FSR_V, FSR_V, FSR_V
185 FSR_V, FSR_V, FSR_V, FSR_V
189 FSR_V, FSR_V, FSR_V, FSR_V
193 FSR_V, FSR_V, FSR_V, FSR_V
[all …]
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| H A D | test_fp0_conv.S | 80 test_ftoi round.s, a2, f0, 0xffc00001, 0, 0x7fffffff, FSR_V
81 test_ftoi round.s, a2, f0, 0xff800001, 0, 0x7fffffff, FSR_V
84 test_ftoi round.s, a2, f0, 0xff800000, 0, 0x80000000, FSR_V
87 test_ftoi round.s, a2, f0, 0xceffffff, 1, 0x80000000, FSR_V
109 test_ftoi round.s, a2, f0, 0x4f000000, 0, 0x7fffffff, FSR_V
110 test_ftoi round.s, a2, f0, 0x4effffff, 1, 0x7fffffff, FSR_V
113 test_ftoi round.s, a2, f0, 0x7f800000, 0, 0x7fffffff, FSR_V
116 test_ftoi round.s, a2, f0, 0x7f800001, 0, 0x7fffffff, FSR_V
117 test_ftoi round.s, a2, f0, 0x7fc00000, 0, 0x7fffffff, FSR_V
122 test_ftoi trunc.s, a2, f0, 0xffc00001, 0, 0x7fffffff, FSR_V
[all …]
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| H A D | test_fp0_sqrt.S | 71 FSR_V, FSR_V, FSR_V, FSR_V
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| H A D | test_fp1.S | 48 test_ord \op b6, f12, f13, 0x3f800000, 0xff800001, \aN, FSR_V /* ord -SNaN */
49 test_ord \op b7, f14, f15, 0x3f800000, 0x7f800001, \aN, FSR_V /* ord +SNaN */
52 test_ord \op b10, f4, f5, 0xff800001, 0x3f800000, \Na, FSR_V /* -SNaN ord */
53 test_ord \op b11, f6, f7, 0x7f800001, 0x3f800000, \Na, FSR_V /* +SNaN ord */
75 test_ord_all olt.s, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, FSR_V
83 test_ord_all ole.s, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, FSR_V
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| H A D | test_fp0_div.S | 67 FSR_V, FSR_V, FSR_V, FSR_V
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| H A D | fpu.h | 17 #define FSR_V 0x00000800 macro
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