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Searched refs:FSL_SRDSCR3_OFFS (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dmpc8536_serdes.c44 #define FSL_SRDSCR3_OFFS 0xc macro
134 tmp = in_be32(sd + FSL_SRDSCR3_OFFS); in fsl_serdes_init()
139 out_be32(sd + FSL_SRDSCR3_OFFS, tmp); in fsl_serdes_init()
158 tmp = in_be32(sd + FSL_SRDSCR3_OFFS); in fsl_serdes_init()
161 out_be32(sd + FSL_SRDSCR3_OFFS, tmp); in fsl_serdes_init()
184 tmp = in_be32(sd + FSL_SRDSCR3_OFFS); in fsl_serdes_init()
189 out_be32(sd + FSL_SRDSCR3_OFFS, tmp); in fsl_serdes_init()
208 tmp = in_be32(sd + FSL_SRDSCR3_OFFS); in fsl_serdes_init()
211 out_be32(sd + FSL_SRDSCR3_OFFS, tmp); in fsl_serdes_init()
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dserdes.c33 #define FSL_SRDSCR3_OFFS 0xc macro
96 out_be32(regs + FSL_SRDSCR3_OFFS, tmp); in fsl_setup_serdes()
117 out_be32(regs + FSL_SRDSCR3_OFFS, tmp); in fsl_setup_serdes()
138 out_be32(regs + FSL_SRDSCR3_OFFS, 0); in fsl_setup_serdes()