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Searched refs:FSL_SRDSCR3_EIC1 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dp1021_serdes.c21 #define FSL_SRDSCR3_EIC1(x) (((x) & 0x1f) << 0) macro
22 #define FSL_SRDSCR3_EIC1_MASK FSL_SRDSCR3_EIC1(0x1f)
88 val |= FSL_SRDSCR3_EIC1(EIC_PCIE); in fsl_serdes_init()