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Searched refs:FSL_SRDSCR3_EIC0_MASK (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dp1021_serdes.c20 #define FSL_SRDSCR3_EIC0_MASK FSL_SRDSCR3_EIC0(0x1f) macro
81 mask = FSL_SRDSCR3_EIC0_MASK; in fsl_serdes_init()