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Searched refs:FSL_SRDSCR2_VDD_1V2 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dserdes.c28 #define FSL_SRDSCR2_VDD_1V2 0x00800000 macro
61 tmp &= ~FSL_SRDSCR2_VDD_1V2; in fsl_setup_serdes()