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Searched refs:FSL_SRDSCR2_EICE_MASK (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dmpc8536_serdes.c39 #define FSL_SRDSCR2_EICE_MASK 0x0000001f macro
130 tmp &= ~FSL_SRDSCR2_EICE_MASK; in fsl_serdes_init()
180 tmp &= ~FSL_SRDSCR2_EICE_MASK; in fsl_serdes_init()