Home
last modified time | relevance | path

Searched refs:FSL_SRDSCR2_EICA_MASK (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dmpc8536_serdes.c36 #define FSL_SRDSCR2_EICA_MASK 0x00001f00 macro
128 tmp &= ~FSL_SRDSCR2_EICA_MASK; in fsl_serdes_init()
154 tmp &= ~FSL_SRDSCR2_EICA_MASK; in fsl_serdes_init()
178 tmp &= ~FSL_SRDSCR2_EICA_MASK; in fsl_serdes_init()
204 tmp &= ~FSL_SRDSCR2_EICA_MASK; in fsl_serdes_init()