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Searched refs:FSL_SRDSCR0_TXEQE_SGMII (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dmpc8536_serdes.c24 #define FSL_SRDSCR0_TXEQE_SGMII 0x00000400 macro
169 tmp |= FSL_SRDSCR0_TXEQE_SGMII; in fsl_serdes_init()