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Searched refs:FSL_CHASSIS3_RCWSR12_REGSR (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/board/freescale/lx2160a/
H A Dlx2160a.c128 sdhc1_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in esdhc_dspi_status_fixup()
164 iic5_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in esdhc_dspi_status_fixup()
332 sdhc1_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in config_board_mux()
371 iic5_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in config_board_mux()
/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch3.h353 #define FSL_CHASSIS3_RCWSR12_REGSR 12 macro