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Searched refs:FSCR_IC_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dmisc_helper.c96 env->spr[SPR_HFSCR] &= ~((target_ulong)FSCR_IC_MASK << FSCR_IC_POS); in raise_hv_fu_exception()
107 env->spr[SPR_FSCR] &= ~((target_ulong)FSCR_IC_MASK << FSCR_IC_POS); in raise_fu_exception()
108 cause &= FSCR_IC_MASK; in raise_fu_exception()
H A Dcpu.h701 #define FSCR_IC_MASK (0xFFULL) macro