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Searched refs:FRAC_PLL_INT_DIV_CTL_VAL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dclock.c663 val_cfg1 = FRAC_PLL_INT_DIV_CTL_VAL(49); in frac_pll_init()
665 val_cfg1 = FRAC_PLL_INT_DIV_CTL_VAL(79); in frac_pll_init()
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dclock.h531 #define FRAC_PLL_INT_DIV_CTL_VAL(n) ((n) & 0x7f) macro