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Searched refs:FP_DIV0 (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu.h98 #define FP_DIV0 8 macro
/openbmc/qemu/target/loongarch/tcg/
H A Dfpu_helper.c57 ret |= FP_DIV0; in ieee_ex_to_loongarch()
/openbmc/qemu/target/mips/tcg/
H A Dfpu_helper.c193 mips_xcpt |= FP_DIV0; in ieee_to_mips_xcpt()
H A Dmsa_helper.c6206 mips_xcpt |= FP_DIV0; in ieee_to_mips_xcpt_msa()
6273 (mips_exception_flags & (FP_INVALID | FP_DIV0)) == 0) { in update_msacsr()