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Searched refs:FPU_CSR_DIV_X (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/arch/loongarch/kernel/
H A Dtraps.c434 else if (fcsr & FPU_CSR_DIV_X) in force_fcsr_sig()
/openbmc/u-boot/arch/mips/include/asm/
H A Dmipsregs.h795 #define FPU_CSR_DIV_X 0x00008000 macro
/openbmc/linux/arch/loongarch/include/asm/
H A Dloongarch.h1447 #define FPU_CSR_DIV_X 0x08000000 macro
/openbmc/linux/arch/mips/kernel/
H A Dtraps.c778 else if (fcr31 & FPU_CSR_DIV_X) in force_fcr31_sig()
/openbmc/linux/arch/mips/include/asm/
H A Dmipsregs.h1177 #define FPU_CSR_DIV_X 0x00008000 macro
/openbmc/linux/arch/mips/math-emu/
H A Dcp1emu.c1956 rcsr |= FPU_CSR_DIV_X | FPU_CSR_DIV_S; in fpu_emu()