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Searched refs:FPU_CSR_COND5 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/mips/include/asm/
H A Dmipsregs.h772 #define FPU_CSR_COND5 (_ULCAST_(1) << FPU_CSR_COND5_S) macro
/openbmc/linux/arch/mips/include/asm/
H A Dmipsregs.h1151 #define FPU_CSR_COND5 (_ULCAST_(1) << FPU_CSR_COND5_S) macro
/openbmc/linux/arch/mips/math-emu/
H A Dcp1emu.c66 FPU_CSR_COND5,