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Searched refs:FPSCR_FR (Results 1 – 8 of 8) sorted by relevance

/openbmc/qemu/target/sh4/
H A Dgdbstub.c59 if (env->fpscr & FPSCR_FR) { in superh_cpu_gdb_read_register()
119 if (env->fpscr & FPSCR_FR) { in superh_cpu_gdb_write_register()
H A Dcpu.h51 #define FPSCR_FR (1 << 21) macro
91 #define TB_FLAG_FPSCR_FR FPSCR_FR /* 21 */
H A Dop_helper.c460 bank = (env->sr & FPSCR_FR) ? 16 : 0; in helper_fipr()
482 bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16; in helper_ftrv()
483 bank_vector = (env->sr & FPSCR_FR) ? 16 : 0; in helper_ftrv()
H A Dtranslate.c469 tcg_gen_xori_i32(cpu_fpscr, cpu_fpscr, FPSCR_FR); in _decode_opc()
2212 ctx->fbank = tbflags & FPSCR_FR ? 0x10 : 0; in sh4_tr_init_disas_context()
/openbmc/linux/arch/sh/math-emu/
H A Dmath.c32 #define FPSCR_FR ((FPSCR>>21)&1) macro
35 #define BANK(n) (n^(FPSCR_FR?16:0))
403 const int flag[] = { FPSCR_SZ, FPSCR_PR, FPSCR_FR, 0 }; in id_fxfd()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h75 #define FPSCR_FR 0x00040000 /* Fraction rounded */ macro
/openbmc/linux/arch/powerpc/include/asm/
H A Dreg.h189 #define FPSCR_FR 0x00040000 /* Fraction rounded */ macro
/openbmc/qemu/target/ppc/
H A Dcpu.h837 #define FPSCR_FR PPC_BIT_NR(45) /* Floating-point fraction rounded */ macro
883 #define FP_FR (1ull << FPSCR_FR)