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Searched refs:FPSCR_DRN0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dcpu.h823 #define FPSCR_DRN0 PPC_BIT_NR(31) /* Decimal Floating-Point rounding ctrl. */ macro
868 #define FP_DRN0 (1ull << FPSCR_DRN0)
H A Ddfp_helper.c74 switch ((fpscr & FP_DRN) >> FPSCR_DRN0) { in dfp_prepare_rounding_mode()
/openbmc/qemu/target/ppc/translate/
H A Dfp-impl.c.inc605 tcg_gen_movi_i64(t1, (uint64_t)a->imm << FPSCR_DRN0);