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Searched refs:FPEXC_NX (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h20 #define FPEXC_NX 0x01 macro
32 #define FSR_NXA (FPEXC_NX << FSR_AEXC_SHIFT)
H A Dfpu_helper.c32 hard |= (soft & float_flag_inexact) ? FPEXC_NX : 0; in riscv_cpu_get_fflags()
45 soft |= (hard & FPEXC_NX) ? float_flag_inexact : 0; in riscv_cpu_set_fflags()