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Searched refs:FCLK_DDR_CM0_CORE (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Drockchip,rk3588-cru.h227 #define FCLK_DDR_CM0_CORE 212 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3588.c1349 GATE(FCLK_DDR_CM0_CORE, "fclk_ddr_cm0_core", "hclk_center_root", CLK_IS_CRITICAL,