Searched refs:EXYNOS_MOUT_AUDSS (Results 1 – 11 of 11) sorted by relevance
59 <&clock_audss EXYNOS_MOUT_AUDSS>,70 <&clock_audss EXYNOS_MOUT_AUDSS>,
56 <&clock_audss EXYNOS_MOUT_AUDSS>,67 <&clock_audss EXYNOS_MOUT_AUDSS>,
142 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,147 <&clock_audss EXYNOS_MOUT_AUDSS>;
134 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,141 <&clock_audss EXYNOS_MOUT_AUDSS>;
110 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,116 <&clock_audss EXYNOS_MOUT_AUDSS>;
177 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
234 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
159 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
13 #define EXYNOS_MOUT_AUDSS 0 macro
106 for (i = EXYNOS_MOUT_AUDSS; i < EXYNOS_DOUT_SRP; i++) { in exynos_audss_clk_teardown()183 clk_table[EXYNOS_MOUT_AUDSS] = clk_hw_register_mux(dev, "mout_audss", in exynos_audss_clk_probe()