Home
last modified time | relevance | path

Searched refs:EPLL (Results 1 – 12 of 12) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock.c140 if (pllreg == EPLL || pllreg == RPLL) { in exynos_get_pll_clk()
198 case EPLL: in exynos4_get_pll_clk()
228 case EPLL: in exynos4x12_get_pll_clk()
259 case EPLL: in exynos5_get_pll_clk()
317 case EPLL: in exynos542x_get_pll_clk()
440 sclk = exynos5_get_pll_clk(EPLL); in exynos5_get_periph_rate()
534 sclk = exynos542x_get_pll_clk(EPLL); in exynos542x_get_periph_rate()
654 sclk = get_pll_clk(EPLL); in exynos4_get_pwm_clk()
715 sclk = get_pll_clk(EPLL); in exynos4_get_uart_clk()
761 sclk = get_pll_clk(EPLL); in exynos4x12_get_uart_clk()
[all …]
/openbmc/u-boot/arch/arm/mach-s5pc1xx/include/mach/
H A Dclk.h13 #define EPLL 2 macro
/openbmc/u-boot/arch/arm/mach-s5pc1xx/
H A Dclock.c39 case EPLL: in s5pc100_get_pll_clk()
90 case EPLL: in s5pc110_get_pll_clk()
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dclk.h12 #define EPLL 2 macro
/openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dpll.c357 EPLL, enumerator
460 { CPM_I2SCDR, EPLL, 30 }, in pll_init()
475 pll_init_one(EPLL, JZ4780_EPLL_M, JZ4780_EPLL_N, JZ4780_EPLL_OD); in pll_init()
/openbmc/linux/arch/arm64/boot/dts/nuvoton/
H A Dma35d1-iot-512m.dts44 <&clk EPLL>,
H A Dma35d1-som-256m.dts44 <&clk EPLL>,
/openbmc/linux/drivers/clk/nuvoton/
H A Dclk-ma35d1-pll.c237 case EPLL: in ma35d1_clk_pll_recalc_rate()
269 case EPLL: in ma35d1_clk_pll_round_rate()
H A Dclk-ma35d1.c508 hws[EPLL] = ma35d1_reg_clk_pll(dev, EPLL, pllmode[3], "epll", in ma35d1_clocks_probe()
/openbmc/linux/include/dt-bindings/clock/
H A Dnuvoton,ma35d1-clk.h23 #define EPLL 12 macro
/openbmc/u-boot/doc/device-tree-bindings/video/
H A Dexynos-fb.txt55 samsung,pclk-name: parent clock identifier: 1(MPLL), 2(EPLL), 3(VPLL)
/openbmc/linux/drivers/clk/ingenic/
H A Djz4780-cgu.c307 .pll = DEF_PLL(EPLL),