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Searched refs:EMC_XM2DQSPADCTRL3 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-nexus7-grouper-memory-timings.dtsi408 0x08000000 /* EMC_XM2DQSPADCTRL3 */
512 0x08000000 /* EMC_XM2DQSPADCTRL3 */
616 0x08000000 /* EMC_XM2DQSPADCTRL3 */
720 0x08000000 /* EMC_XM2DQSPADCTRL3 */
822 0x08000021 /* EMC_XM2DQSPADCTRL3 */
925 0x0a000021 /* EMC_XM2DQSPADCTRL3 */
1033 0x08000000 /* EMC_XM2DQSPADCTRL3 */
1137 0x08000000 /* EMC_XM2DQSPADCTRL3 */
1241 0x08000000 /* EMC_XM2DQSPADCTRL3 */
1345 0x08000000 /* EMC_XM2DQSPADCTRL3 */
[all …]
H A Dtegra30-asus-nexus7-tilapia-memory-timings.dtsi103 0x08000021 /* EMC_XM2DQSPADCTRL3 */
207 0x08000021 /* EMC_XM2DQSPADCTRL3 */
310 0x0c000021 /* EMC_XM2DQSPADCTRL3 */
H A Dtegra124-nyan-big-emc.dtsi1282 0x51451400 /* EMC_XM2DQSPADCTRL3 */
1450 0x51451400 /* EMC_XM2DQSPADCTRL3 */
1618 0x51451400 /* EMC_XM2DQSPADCTRL3 */
1786 0x51451400 /* EMC_XM2DQSPADCTRL3 */
1954 0x51451400 /* EMC_XM2DQSPADCTRL3 */
2122 0x51451400 /* EMC_XM2DQSPADCTRL3 */
2290 0x51451420 /* EMC_XM2DQSPADCTRL3 */
2458 0x51451420 /* EMC_XM2DQSPADCTRL3 */
2626 0x51451420 /* EMC_XM2DQSPADCTRL3 */
2794 0x51451420 /* EMC_XM2DQSPADCTRL3 */
[all …]
H A Dtegra30-ouya.dts2746 0x08000000 /* EMC_XM2DQSPADCTRL3 */
2848 0x08000000 /* EMC_XM2DQSPADCTRL3 */
2950 0x08000000 /* EMC_XM2DQSPADCTRL3 */
3052 0x08000000 /* EMC_XM2DQSPADCTRL3 */
3152 0x08000021 /* EMC_XM2DQSPADCTRL3 */
3253 0x08000021 /* EMC_XM2DQSPADCTRL3 */
3359 0x08000000 /* EMC_XM2DQSPADCTRL3 */
3461 0x08000000 /* EMC_XM2DQSPADCTRL3 */
3563 0x08000000 /* EMC_XM2DQSPADCTRL3 */
3665 0x08000000 /* EMC_XM2DQSPADCTRL3 */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra30-emc.yaml196 - description: EMC_XM2DQSPADCTRL3
341 0x0c000021 /* EMC_XM2DQSPADCTRL3 */
H A Dnvidia,tegra124-emc.yaml300 - description: EMC_XM2DQSPADCTRL3
533 0x51451400 /* EMC_XM2DQSPADCTRL3 */
/openbmc/linux/drivers/memory/tegra/
H A Dtegra30-emc.c90 #define EMC_XM2DQSPADCTRL3 0x0f8 macro
317 [78] = EMC_XM2DQSPADCTRL3,
476 val = readl_relaxed(emc->regs + EMC_XM2DQSPADCTRL3); in emc_dqs_preset()
480 writel_relaxed(val, emc->regs + EMC_XM2DQSPADCTRL3); in emc_dqs_preset()
H A Dtegra124-emc.c116 #define EMC_XM2DQSPADCTRL3 0xf8 macro
430 EMC_XM2DQSPADCTRL3,