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/openbmc/linux/Documentation/devicetree/bindings/nvmem/
H A Dlpc1857-eeprom.txt1 * NXP LPC18xx EEPROM memory NVMEM driver
8 - reg: EEPROM registers.
9 - mem: EEPROM address space.
12 - eeprom: EEPROM operating clock.
14 the EEPROM in reset.
15 - interrupts: Should contain EEPROM interrupt.
H A Dzii,rave-sp-eeprom.txt1 Zodiac Inflight Innovations RAVE EEPROM Bindings
3 RAVE SP EEPROM device is a "MFD cell" device exposing physical EEPROM
15 - zii,eeprom-name: Unique EEPROM identifier describing its function in the
/openbmc/linux/drivers/misc/eeprom/
H A DKconfig2 menu "EEPROM support"
50 tristate "Old I2C EEPROM reader (DEPRECATED)"
53 If you say yes here you get read-only access to the EEPROM data
67 If you say yes here you get read-only support for the user EEPROM of
68 the Maxim MAX6874/5 EEPROM-programmable, quad power-supply
78 tristate "EEPROM 93CX6 support"
80 This is a driver for the EEPROM chipsets 93c46 and 93c66.
86 tristate "Microwire EEPROM 93XX46 support"
92 Driver for the microwire EEPROM chipsets 93xx46x. The driver
94 erase the whole EEPROM.
[all …]
/openbmc/u-boot/drivers/w1-eeprom/
H A DKconfig2 # EEPROM subsystem configuration
5 menu "1-wire EEPROM support"
16 bool "Enable Maxim DS24 families EEPROM support"
19 Maxim DS24 EEPROMs 1-Wire EEPROM support
35 bool "Enable sandbox onewire EEPROM driver"
38 Sandbox driver for a onewire EEPROM memory
/openbmc/u-boot/board/ge/common/
H A DKconfig2 hex "I2C address of the EEPROM device used for VPD"
7 int "I2C bus of the EEPROM device used for VPD."
10 int "Size in bytes of the EEPROM device used for VPD"
13 int "Number of bytes to use for VPD EEPROM address"
/openbmc/linux/Documentation/misc-devices/
H A Dmax6875.rst21 The Maxim MAX6875 is an EEPROM-programmable power-supply sequencer/supervisor.
23 It also provides 512 bytes of user EEPROM.
25 At reset, the MAX6875 reads the configuration EEPROM into its configuration
45 eeprom - 512 bytes of user-defined EEPROM space.
93 The configuration EEPROM is at addresses 0x8000 - 0x8045.
95 The user EEPROM is at addresses 0x8100 - 0x82ff.
97 Use i2c_smbus_write_word_data() to write a byte to EEPROM.
112 Reading data from the EEPROM is a little more complicated.
H A Deeprom.rst7 * Any EEPROM chip in the designated address range
57 This is a simple EEPROM module meant to enable reading the first 256 bytes
58 of an EEPROM (on a SDRAM DIMM for example). However, it will access serial
74 Recent Sony Vaio laptops have an EEPROM at 0x57. We couldn't get the
105 should have some EEPROM directories in ``/sys/bus/i2c/devices/*`` of names such
107 contains the binary data from EEPROM.
/openbmc/entity-manager/docs/
H A Daddress_size_detection_modes.md1 # EEPROM address size detection modes
4 address byte(s) needed for a given EEPROM device.
22 - If any "2 address bytes" EEPROM from any vendor has the same data in all
26 - ONSEMI EEPROM (a 2 address bytes device) return the same data from the same
35 and should be applicable to any IIC EEPROM manufacturer.
62 the 1-byte address devices will start internal write cycle, altering the EEPROM
65 This proposal MODE-2 suffers the same 1st issue as MODE-1 ie. what if the EEPROM
76 Based on this note, the designer of every EEPROM has the "freedom" to use
80 Based on this, the others EEPROM (not ONSEMI EEPROM) auto-increment - observed
89 Based on this note, EEPROM must update this pointer immediately following this
/openbmc/u-boot/examples/standalone/
H A DREADME.smc91111_eeprom137 LAN91C111 EEPROM <- Non-volatile
143 To set the EEPROM MAC address to 12:34:56:78:9A:BC
147 Writing EEPROM register 20 with 3412
150 Writing EEPROM register 21 with 7856
153 Writing EEPROM register 22 with bc9a
154 EEPROM contents copied to MAC
158 Current MAC Address in EEPROM 12:34:56:78:9a:bc
178 - D : Dump the LAN91C111 EEPROM contents
180 - C : Copies the MAC address from the EEPROM to the LAN91C111
181 - W : Write a register in the EEPROM or in the MAC
[all …]
/openbmc/linux/drivers/w1/slaves/
H A DKconfig70 tristate "112-byte EEPROM support (DS28E05)"
73 is a 112-byte user-programmable EEPROM is
78 tristate "256b EEPROM family support (DS2430)"
80 Say Y here if you want to use a 1-wire 256bit EEPROM
82 This EEPROM is organized as one page of 32 bytes for random
86 tristate "1kb EEPROM family support (DS2431)"
89 1kb EEPROM family device (DS2431)
92 tristate "4kb EEPROM family support (DS2433)"
95 4kb EEPROM family device (DS2433).
144 tristate "4096-Bit Addressable 1-Wire EEPROM with PIO (DS28E04-100)"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Disil,isl12026.txt1 ISL12026 I2C RTC/EEPROM
3 ISL12026 is an I2C RTC/EEPROM combination device. The RTC and control
4 registers respond at bus address 0x6f, and the EEPROM array responds
/openbmc/u-boot/board/ti/common/
H A DKconfig5 Evaluation Boards which have I2C based EEPROM detection
8 int "Board EEPROM's I2C bus address"
13 hex "Board EEPROM's I2C chip address"
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-facebook-catalina.dts262 // IO Mezz 0 FRU EEPROM
376 // IO Mezz 1 FRU EEPROM
572 // PDB FRU EEPROM
605 // OSFP FRU EEPROM
616 // FIO FRU EEPROM
664 // Module 0 EEPROM
670 // Module 1 EEPROM
729 // HDD FRU EEPROM
785 // SCM FRU EEPROM
791 // BSM FRU EEPROM
[all...]
/openbmc/u-boot/doc/
H A DI2C_Edge_Conditions5 and the CPU was reset. This may result in EEPROM data corruption.
18 The EEPROM sees:
22 4) device address "EEPROM interprets this as offset"
23 5) Offset in device, "EEPROM interprets this as data to write"
/openbmc/u-boot/board/davinci/da8xxevm/
H A DKconfig26 bool "MAC address in EEPROM"
31 EEPROM available. Enable this option to read the
32 MAC from the EEPROM
/openbmc/u-boot/board/boundary/nitrogen6x/
H A D6x_upgrade.txt34 echo "Error re-reading EEPROM" ;
38 echo "Error reading boot loader from EEPROM" ;
41 echo "Error initializing EEPROM" ;
/openbmc/phosphor-fan-presence/docs/presence/
H A Deeprom.md6 used to have the application re-bind the EEPROM driver to the EEPROM instance
7 after a new fan is detected. This will trigger the EEPROM to be read by the
/openbmc/linux/Documentation/w1/slaves/
H A Dw1_ds28e04.rst7 * Maxim DS28E04-100 4096-Bit Addressable 1-Wire EEPROM with PIO
28 from the EEPROM of the DS28E04.
31 to the EEPROM of the DS28E04. If CRC checking mode is enabled only
/openbmc/openbmc/meta-openpower/recipes-phosphor/vpd/openpower-fru-vpd/
H A Dop-vpd-parser.service2 Description=Read OpenPOWER-format VPD from EEPROM
11 ExecStart=/usr/bin/openpower-read-vpd --vpd $EEPROM --fru $FRUS --object $PATHS
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-driver-w1_therm22 device data to its embedded EEPROM, either restore data
23 embedded in device EEPROM. Be aware that devices support
24 limited EEPROM writing cycles (typical 50k)
26 * 'save': save device RAM to EEPROM
27 * 'restore': restore EEPROM data in device RAM
54 power is lost. Trigger a 'save' to EEPROM command to keep
99 * '0' : save the 2 or 3 bytes to the device EEPROM
/openbmc/linux/drivers/misc/mchp_pci1xxxx/
H A DKconfig2 tristate "Microchip PCI1XXXX PCIe to GPIO Expander + OTP/EEPROM manager"
11 which also has registers to interface with the OTP and EEPROM.
/openbmc/u-boot/doc/device-tree-bindings/w1-eeprom/
H A Deep_sandbox.txt1 Onewire EEPROM sandbox driver device binding - one wire protocol sandbox EEPROM
/openbmc/linux/Documentation/i2c/
H A Dslave-eeprom-backend.rst2 Linux I2C slave EEPROM backend
7 This backend simulates an EEPROM on the connected I2C bus. Its memory contents
/openbmc/u-boot/board/lego/ev3/
H A DREADME11 The EV3 contains a bootloader in EEPROM that loads u-boot.bin from address 0x0
12 of the SPI flash memory (with a size of 256KiB!). Because the EEPROM is read-
44 The EEPROM contains a program for uploading an image file to the flash memory.
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmicrochip,lan78xx.txt4 an external EEPROM, but some platforms (e.g. Raspberry Pi 3 B+) have neither.
5 The Device Tree properties, if present, override the OTP and EEPROM.

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