Searched refs:E4210_DIV_CPU0 (Results 1 – 1 of 1) sorted by relevance
41 #define E4210_DIV_CPU0 0x300 macro142 div0 = readl(base + E4210_DIV_CPU0); in exynos_set_safe_div()144 writel(div0, base + E4210_DIV_CPU0); in exynos_set_safe_div()212 writel(div0, base + E4210_DIV_CPU0); in exynos_cpuclk_pre_rate_change()