Searched refs:E1000_RXDCTL_QUEUE_ENABLE (Results 1 – 8 of 8) sorted by relevance
91 #define E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Rx Que */ macro
1378 ew32(RXDCTL(0), rxdctl & ~E1000_RXDCTL_QUEUE_ENABLE); in igbvf_configure_rx()1394 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE; in igbvf_configure_rx()1578 ew32(RXDCTL(0), rxdctl & ~E1000_RXDCTL_QUEUE_ENABLE); in igbvf_down()
145 #define E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Rx Queue */ macro
1961 rxdctl[i] & ~E1000_RXDCTL_QUEUE_ENABLE); in igb_rx_fifo_flush_82575()1969 if (!(rx_enabled & E1000_RXDCTL_QUEUE_ENABLE)) in igb_rx_fifo_flush_82575()
1157 E1000_RXDCTL_QUEUE_ENABLE },1159 E1000_RXDCTL_QUEUE_ENABLE },1197 E1000_RXDCTL_QUEUE_ENABLE },
4822 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE; in igb_configure_rx_ring()
189 #define E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Rx Queue */ macro
969 if (!(core->mac[RXDCTL0 + (i * 16)] & E1000_RXDCTL_QUEUE_ENABLE)) { in igb_can_receive()2055 !(core->mac[RXDCTL0 + (i * 16)] & E1000_RXDCTL_QUEUE_ENABLE)) { in igb_receive_internal()2468 core->mac[RXDCTL0 + (qn0 * 16)] &= ~E1000_RXDCTL_QUEUE_ENABLE; in igb_core_vf_reset()2469 core->mac[RXDCTL0 + (qn1 * 16)] &= ~E1000_RXDCTL_QUEUE_ENABLE; in igb_core_vf_reset()4369 [RXDCTL0] = E1000_RXDCTL_QUEUE_ENABLE | (1 << 16),