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Searched refs:DWB_OGAM_RAMA_START_CNTL_R (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dwb.h70 SR(DWB_OGAM_RAMA_START_CNTL_R),\
227 SF_DWB2(DWB_OGAM_RAMA_START_CNTL_R, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_START_R, mask_sh),\
228 SF_DWB2(DWB_OGAM_RAMA_START_CNTL_R, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_START_SEGMENT_R, mask_sh),\
775 uint32_t DWB_OGAM_RAMA_START_CNTL_R; member
H A Ddcn30_dwb_cm.c91 gam_regs.start_cntl_r = REG(DWB_OGAM_RAMA_START_CNTL_R); in dwb3_program_ogam_luta_settings()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.h621 SR_ARR(DWB_OGAM_RAMA_START_CNTL_R, id), \