Searched refs:DWB_OGAM_RAMA_START_CNTL_G (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dwb.h | 69 SR(DWB_OGAM_RAMA_START_CNTL_G),\
225 SF_DWB2(DWB_OGAM_RAMA_START_CNTL_G, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_START_G, mask_sh),\
226 SF_DWB2(DWB_OGAM_RAMA_START_CNTL_G, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_START_SEGMENT_G, mask_sh),\
774 uint32_t DWB_OGAM_RAMA_START_CNTL_G; member
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| H A D | dcn30_dwb_cm.c | 90 gam_regs.start_cntl_g = REG(DWB_OGAM_RAMA_START_CNTL_G); in dwb3_program_ogam_luta_settings()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.h | 620 SR_ARR(DWB_OGAM_RAMA_START_CNTL_G, id), \
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