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Searched refs:DWB_OGAM_LUT_CONTROL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dwb_cm.c179 REG_UPDATE_2(DWB_OGAM_LUT_CONTROL, in dwb3_configure_ogam_lut()
204 REG_UPDATE(DWB_OGAM_LUT_CONTROL, in dwb3_program_ogam_pwl()
214 REG_UPDATE(DWB_OGAM_LUT_CONTROL, in dwb3_program_ogam_pwl()
224 REG_UPDATE(DWB_OGAM_LUT_CONTROL, in dwb3_program_ogam_pwl()
H A Ddcn30_dwb.h67 SR(DWB_OGAM_LUT_CONTROL),\
218 SF_DWB2(DWB_OGAM_LUT_CONTROL, DWBCP, 0, DWB_OGAM_LUT_WRITE_COLOR_MASK, mask_sh),\
219 SF_DWB2(DWB_OGAM_LUT_CONTROL, DWBCP, 0, DWB_OGAM_LUT_READ_COLOR_SEL, mask_sh),\
220 SF_DWB2(DWB_OGAM_LUT_CONTROL, DWBCP, 0, DWB_OGAM_LUT_READ_DBG, mask_sh),\
221 SF_DWB2(DWB_OGAM_LUT_CONTROL, DWBCP, 0, DWB_OGAM_LUT_HOST_SEL, mask_sh),\
222 SF_DWB2(DWB_OGAM_LUT_CONTROL, DWBCP, 0, DWB_OGAM_LUT_CONFIG_MODE, mask_sh),\
772 uint32_t DWB_OGAM_LUT_CONTROL; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.h618 SR_ARR(DWB_OGAM_LUT_CONTROL, id), \