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Searched refs:DV_DDR_SDCR_DDRDRIVE0_SHIFT (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-davinci/include/mach/
H A Dddr2_defs.h62 #define DV_DDR_SDCR_DDRDRIVE0_SHIFT 18 macro
/openbmc/u-boot/include/configs/
H A Dcalimain.h53 (1 << DV_DDR_SDCR_DDRDRIVE0_SHIFT) | \
H A Dipam390.h89 (1 << DV_DDR_SDCR_DDRDRIVE0_SHIFT) | \